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MC10E137, MC100E137 5 V ECL 8-Bit Ripple Counter
Description
The MC10E/100E137 is a very high speed binary ripple counter. The two least significant bits were designed with very fast edge rates while the more significant bits maintain standard ECLinPSTM output edge rates. This allows the counter to operate at very high frequencies while maintaining a moderate power dissipation level. The device is ideally suited for multiple frequency clock generation as well as a counter in a high performance ATE time measurement board. Both asynchronous and synchronous enables are available to maximize the device's flexibility for various applications. The asynchronous enable input, A_Start, when asserted enables the counter while overriding any synchronous enable signals. The E137 features XORed enable inputs, EN1 and EN2, which are synchronous to the CLK input. When only one synchronous enable is asserted the counter becomes disabled on the next CLK transition; all outputs remain in the previous state poised for the other synchronous enable or A_Start to be asserted to re-enable the counter. Asserting both synchronous enables causes the counter to become enabled on the next transition of the CLK. If EN1 (or EN2) and CLK edges are coincident, sufficient delay has been inserted in the CLK path (to compensate for the XOR gate delay and the internal D-flip flop setup time) to insure that the synchronous enable signal is clocked correctly, hence, the counter is disabled. All input pins left open will be pulled LOW via an input pulldown resistor. Therefore, do not leave the differential CLK inputs open. Doing so causes the current source transistor of the input clock gate to become saturated, thus upsetting the internal bias regulators and jeopardizing the stability of the device. The asynchronous Master Reset resets the counter to an all zero state upon assertion. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation.
Features
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PLCC-28 FN SUFFIX CASE 776
MARKING DIAGRAM*
1
MCxxxE137FNG AWLYYWW
xxx A WL YY WW G
= 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
* * * * * * * *
Differential Clock Input and Data Output Pins VBB Output for Single-Ended Use Synchronous and Asynchronous Enable Pins Asynchronous Master Reset PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V Internal Input 50 kW Pull-down Resistors Transistor Count = 330 devices
* ESD Protection: Human Body Model: > 2 kV, * * * *
Machine Model: > 200 V Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: Pb = 1; Pb-Free = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V-0 @ 0.125 in, Oxygen Index: 28 to 34 Pb-Free Packages are Available*
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 8
1
Publication Order Number: MC10E137/D
MC10E137, MC100E137
Q7 A_Start EN1 EN2 VEE CLK CLK VBB 26 27 28 1 2 3 4 5 6 7 Q0 8 Q0 9 Q1 10 Q1 11 VCCO 25 Q7 24 Q6 23 Q6 22 VCCO 21 Q5 20 Q5 19 18 17 16 Q4 Q4 VCC Q3 Q3 Q2 Q2
Table 1. PIN DESCRIPTION
PIN CLK, CLK Q0-Q7, Q0-Q7 A_Start EN1, EN2 MR VBB VCC, VCCO VEE FUNCTION ECL Differential Clock Inputs ECL Differential Q Outputs ECL Asynchronous Enable Input ECL Synchronous Enable Inputs Asynchronous Master Reset Reference Voltage Output Positive Supply Negative Supply
Pinout: 28-Lead PLCC (Top View)
15 14 13 12
MR VCCO
* All VCC and VCCO pins are tied together on the die. Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. 28-Lead Pinout
A_Start EN1 EN2 D CLK CLK CLK CLK VBB MR R Q Q CLK CLK D R Q Q CLK CLK D R Q Q CLK CLK D R Q Q Q0 Q0 Q1 Q1 Q7 Q7
Figure 2. Logic Diagram
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MC10E137, MC100E137
Table 2. SEQUENTIAL TRUTH TABLE
Function Reset Count EN1 X L L L H H H H L L L L L L H H H H H L L L X EN2 X L L L L L L L L L L L H H H H H L L L L L X A_Start X L L L L L H H H L L L L L L L L L L L L L X MR H L L L L L L L L L L L L L L L L L L L L L H CLK X Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z Z X Q7 L L L L L L L L L L L L L L L L L L L L L L L Q6 L L L L L L L L L L L L L L L L L L L L L L L Q5 L L L L L L L L L L L L L L L L L L L L L L L Q4 L L L L L L L L L L L L L L L L L L L L L L L Q3 L L L L L L L L L L H H H H H H H H H H H H L Q2 L L L L L L H H H H L L L L L L H H H H H H L Q1 L L H H H H L L H H L L L L H H L L L L H H L Q0 L H L H H H L H L H L H H H L H L L L H L H L
Stop Asynch Start
Count
Stop Synch Start
Stop Count
Reset
Z = Low to High Transition
Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout TA Tstg qJA qJC VEE Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) PECL Operating Range NECL Operating Range Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board PLCC-28 PLCC-28 PLCC-28 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI v VCC VI w VEE Condition 2 Rating 8 -8 6 -6 50 100 0 to +85 -65 to +150 63.5 43.5 22 to 26 4.2 to 5.7 -5.7 to -4.2 265 265 Unit V V V V mA mA C C C/W C/W C/W V V C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC10E137, MC100E137
Table 4. 10E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 1)
0C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 2) Output LOW Voltage (Note 2) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) Input HIGH Current Input LOW Current 0.5 0.3 3980 3050 3830 3050 3.62 2.2 Min Typ 121 40 70 3210 3995 3285 Max 145 4160 3370 4160 3520 3.73 4.6 4020 3050 3870 3050 3.65 2.2 Min 25C Typ 121 4105 3210 4030 3285 Max 145 4190 3370 4190 3520 3.75 4.6 4090 3050 3940 3050 3.69 2.2 Min 85C Typ 121 4185 3227 4110 3302 Max 145 4280 3405 4280 3555 3.81 4.6 Unit mA mV mV mV mV V V
IIH IIL
150 0.5 0.25
150 0.3 0.2
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary -0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC - 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
Table 5. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = -5.0 V (Note 4)
0C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 5) Output LOW Voltage (Note 5) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 6) Input HIGH Current Input LOW Current 0.5 0.3 -1020 -1950 -1170 -1950 -1.38 -2.8 Min Typ 121 -930 -1790 -1005 -1715 Max 145 -840 -1630 -840 -1480 -1.27 -0.4 -980 -1950 -1130 -1950 -1.35 -2.8 Min 25C Typ 121 -895 -1790 -970 -1715 Max 145 -810 -1630 -810 -1480 -1.25 -0.4 -910 -1950 -1060 -1950 -1.31 -2.8 Min 85C Typ 121 -815 -1773 -890 -1698 Max 145 -720 -1595 -720 -1445 -1.19 -0.4 Unit mA mV mV mV mV V V
IIH IIL
150 0.5 0.065
150 0.3 0.2
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary -0.46 V / +0.06 V. 5. Outputs are terminated through a 50 W resistor to VCC - 2.0 V. 6. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
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MC10E137, MC100E137
Table 6. 100E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 7)
0C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 8) Output LOW Voltage (Note 8) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 9) Input HIGH Current Input LOW Current 0.5 0.3 3975 3190 3835 3190 3.62 2.2 Min Typ 121 4050 3295 3975 3355 Max 145 4120 3380 4120 3525 3.73 4.6 3975 3190 3835 3190 3.62 2.2 Min 25C Typ 121 4050 3255 3975 3355 Max 145 4120 3380 4120 3525 3.74 4.6 3975 3190 3835 3190 3.62 2.2 Min 85C Typ 139 4050 3260 3975 3355 Max 167 4120 3380 4120 3525 3.74 4.6 Unit mA mV mV mV mV V V
IIH IIL
150 0.5 0.25
150 0.5 0.2
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary -0.46 V / +0.8 V. 8. Outputs are terminated through a 50 W resistor to VCC - 2.0 V. 9. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
Table 7. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = -5.0 V (Note 10)
0C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 11) Output LOW Voltage (Note 11) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 12) Input HIGH Current Input LOW Current 0.5 0.3 -1025 -1810 -1165 -1810 -1.38 -3.8 Min Typ 121 -950 -1705 -1025 -1645 Max 145 -880 -1620 -880 -1475 -1.27 -0.4 -1025 -1810 -1165 -1810 -1.38 -3.8 Min 25C Typ 121 -950 -1745 -1025 -1645 Max 145 -880 -1620 -880 -1475 -1.26 -0.4 -1025 -1810 -1165 -1810 -1.38 -3.8 Min 85C Typ 139 -950 -1740 -1025 -1645 Max 167 -880 -1620 -880 -1475 -1.26 -0.4 Unit mA mV mV mV mV V V
IIH IIL
150 0.5 0.25
150 0.5 0.2
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary -0.46 V / +0.8 V. 11. Outputs are terminated through a 50 W resistor to VCC - 2.0 V. 12. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC.
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MC10E137, MC100E137
Table 8. AC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = -5.0 V (Note 13)
0C Symbol fCOUNT tPLH tPHL Characteristic Maximum Count Frequency Propagation Delay to Output CLK to Q0 CLK to Q1 CLK to Q2 CLK to Q3 CLK to Q4 CLK to Q5 CLK to Q6 CLK to Q7 A_Start to Q0 MR to Q0 Min 1800 1300 1600 1950 2275 2625 2950 3250 3575 950 700 0 300 MR, A_Start 400 400 0.25 <1 Q0,Q1 Q2 to Q7 150 275 400 600 150 275 1.0 Typ 2200 1700 2025 2425 2750 3125 3450 3775 4075 1325 1000 -150 150 200 2150 2500 2925 3350 3750 4150 4450 4800 1700 1300 Max Min 1800 1300 1600 1950 2275 2625 2950 3250 3575 950 700 0 300 400 400 0.25 <1 400 600 150 275 1.0 25C Typ 2200 1700 2050 2450 2775 3150 3475 3800 4125 1325 1000 -150 150 200 2150 2500 2925 3350 3750 4150 4450 4800 1700 1300 Max Min 1800 1350 1650 2025 2350 2700 3050 3375 3700 950 700 0 300 400 400 0.25 <1 400 600 1.0 85C Typ 2200 1750 2100 2500 2850 3225 3550 3925 4250 1325 1000 -150 150 200 2200 2550 3000 3425 3825 4250 4600 4950 1700 1300 Max Unit MHz ps
ts th tRR tPW VPP tJITTER tr tf
Setup Time (EN1, EN2) Hold Time (EN1, EN2) Reset Recovery Time
ps ps ps ps V ps ps
Minimum Pulse Width CLK, MR, A_Start Input Voltage Swing CLK/CLK (Differential Configuration) (Note 14) Random Clock Jitter (RMS) Rise/Fall Times (20%-80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. 10 Series: VEE can vary -0.46 V / +0.06 V. 100 Series: VEE can vary -0.46 V / +0.8 V. 14. Minimum input swing for which AC parameters are guaranteed. Full DC ECL output swings will be generated with only 50 mV input swings.
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MC10E137, MC100E137
Q Driver Device Q Zo = 50 W 50 W 50 W D Zo = 50 W D Receiver Device
VTT VTT = VCC - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC10E137FN MC10E137FNG MC10E137FNR2 MC10E137FNR2G MC100E137FN MC100E137FNG MC100E137FNR2 MC100E137FNR2G Package PLCC-28 PLCC-28 (Pb-Free) PLCC-28 PLCC-28 (Pb-Free) PLCC-28 PLCC-28 (Pb-Free) PLCC-28 PLCC-28 (Pb-Free) Shipping 37 Units / Rail 37 Units / Rail 500 / Tape & Reel 500 / Tape & Reel 37 Units / Rail 37 Units / Rail 500 / Tape & Reel 500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10E137, MC100E137
PACKAGE DIMENSIONS
PLCC-28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776-02 ISSUE E
Y BRK D Z -L- -M- B 0.007 (0.180) U
M
T L-M
M
S
N
S S
-N-
0.007 (0.180)
T L-M
N
S
W
28 1
D
V
X VIEW D-D
G1
0.010 (0.250)
S
T L-M
S
N
S
A Z R E G G1 0.010 (0.250)
S
0.007 (0.180) 0.007 (0.180)
M M
T L-M T L-M
S S
N N
S S
H
0.007 (0.180)
M
T L-M
S
N
S
C
K1 0.004 (0.100) -T- SEATING
PLANE
J
K F VIEW S 0.007 (0.180)
M
VIEW S T L-M
S
T L-M
S
N
S
N
S
NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
DIM A B C E F G H J K R U V W X Y Z G1 K1
INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 --- 0.025 --- 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 --- 0.020 2_ 10_ 0.410 0.430 0.040 ---
MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 --- 0.64 --- 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 --- 0.50 2_ 10_ 10.42 10.92 1.02 ---
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MC10E137, MC100E137
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MC10E137/D

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